Neutron induced noise degradation of ASICs in 350 nm CMOS technology

Radiation tolerance of a 64-channels Application Specific Integrated Circuit (ASIC) used for the readout of scintillation neutron detector at CSNS has been tested using 1 MeV neutrons. This kind of ASICs is designed in 350 nm CMOS processes and consists of a charge sensitive pre-amplifier (CSA), a f...

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Bibliographic Details
Published in:Journal of instrumentation 2020-10, Vol.15 (10), p.T10005-T10005
Main Authors: Zhang, Y., Chen, S.-j., Liu, Y., Wu, W.-h., Song, Y., Zhong, L., Zhou, H., Sun, Z.-j.
Format: Article
Language:English
Subjects:
Amplifiers
Application specific integrated circuits
Background noise
CMOS
Degradation
Integrated circuits
Leakage current
MOS devices
Neutron counters
Neutrons
Noise
Radiation tolerance
Semiconductor devices
Silicon substrates
Transistors
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Summary:Radiation tolerance of a 64-channels Application Specific Integrated Circuit (ASIC) used for the readout of scintillation neutron detector at CSNS has been tested using 1 MeV neutrons. This kind of ASICs is designed in 350 nm CMOS processes and consists of a charge sensitive pre-amplifier (CSA), a fast shaper amplifier, a discriminator and a mono-stable. MOS transistors are utilized to build the input stage in the CSA. After neutron irradiations, the gain and the rising time are not changed, but the increasement of background noise is observed. Similar degradations are also found in the leakage current of MOS transistors manufactured by similar process as the ASIC. The similar responses support that the noise degradation of ASIC should originate from the degradation of the individual MOS transistors. Further, we deduce these phenomenon to the displacement damage in Si substrate induced by neutrons.
ISSN:1748-0221
1748-0221
DOI:10.1088/1748-0221/15/10/T10005