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Recent diagnostic developments at ASDEX Upgrade with the FPGA implemented Serial I/O System “SIO2” and “Pipe2” DAQ periphery

•“Unsolvable” combination of time and data integrated with the data sampling concept.•Low latency DAQ of bulk data for real-time analysis and plasma control.•Flexible modular analogue input channel aggregation up-to great numbers.•DAQ modules designed for various fusion research relevant requirement...

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Published in:Fusion engineering and design 2020-10, Vol.159, p.111873, Article 111873
Main Authors: Behler, K.C., Eixenberger, H., Kurzan, B., Lohs, A., Lüddecke, K., Maraschek, M., Merkel, R., Raupp, G., Sellmair, G., Sieglin, B., Treutterer, W.
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container_start_page 111873
container_title Fusion engineering and design
container_volume 159
creator Behler, K.C.
Eixenberger, H.
Kurzan, B.
Lohs, A.
Lüddecke, K.
Maraschek, M.
Merkel, R.
Raupp, G.
Sellmair, G.
Sieglin, B.
Treutterer, W.
description •“Unsolvable” combination of time and data integrated with the data sampling concept.•Low latency DAQ of bulk data for real-time analysis and plasma control.•Flexible modular analogue input channel aggregation up-to great numbers.•DAQ modules designed for various fusion research relevant requirements.•GigaSample event recording channels designed and deployed for Thomson Scattering. ASDEX Upgrade (AUG) since many years has been using a built to purpose FPGA PCIe computer interface with fast serial interconnects – called “SIO” – connecting to peripheral crates based on a pipeline organized backplane – called “Pipe” [1]11“SIO” or “SIO2” and “Pipe” or “Pipe2” are the short names of the DAQ concepts described in this paper. The figure “2” in these names refers to the actual revision which is an extended version of the first approach developed already 2007. – containing modular DAQ devices. The combination of custom built input channels, aggregated into multi-channel FPGA controlled backplanes and streamed by one or more SIO2 FPGA cards via DMA into computer memory enables the deterministic delivery of data for real-time applications with minimum latency. The renewal of large diagnostics for the Mirnov probes, the Soft-X-Ray cameras and others have been successfully conducted. These diagnostics have undergone the transition from Solaris to Linux CentOS with real-time kernel. These systems, receiving a stream of measured samples from the SIO2 periphery via DMA, directly provide data for plasma control via sharing the DMA memory sections with dedicated application processes (APs) running on the same node as part of the AUG distributed discharge control system [2,3]. The SIO2 DAQ is further applied to a Thomson-Scattering (TS) system located in the AUG Divertor (DTS). New GigaSample ADCs developed for this diagnostic expand the range of measuring periphery into the GHz range. The same ADCs are planned to be used to refurbish and real-time enable the main chamber Thomson-Scattering system. The paper describes the concepts of the “Pipe2” periphery and the “SIO2” interface card. It briefly summarizes specifics of the diagnostics mentioned above and puts further emphasis on design modifications of the FPGA firmware to address new requirements. It will also give a short description of the developed GSPS ADC/FPGA periphery cards.
doi_str_mv 10.1016/j.fusengdes.2020.111873
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1873-7196
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source ScienceDirect Journals
subjects Backplanes
Computer memory
Data acquisition
Design modifications
Diagnostic systems
Firmware
FPGA
Interface cards
Modular computer periphery
Modular equipment
Plasma control
Plasma diagnostic
Real time
Scattering
Serial I/O
Thomson scattering
title Recent diagnostic developments at ASDEX Upgrade with the FPGA implemented Serial I/O System “SIO2” and “Pipe2” DAQ periphery
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