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Synchronization and Sampling Time Analysis of Feedback Loop for FPGA-Based PMSM Drive System

The proportional-integral (PI)-based control for the motor drive system is commonly used in industrial applications. However, motor drive system development and prototyping are tedious tasks especially considering a field programmable gate array (FPGA)-based real-time system implementation. In addit...

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Bibliographic Details
Published in:Electronics (Basel) 2020-11, Vol.9 (11), p.1906
Main Authors: Mishra, Ipsita, Tripathi, Ravi Nath, Hanamoto, Tsuyoshi
Format: Article
Language:English
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Summary:The proportional-integral (PI)-based control for the motor drive system is commonly used in industrial applications. However, motor drive system development and prototyping are tedious tasks especially considering a field programmable gate array (FPGA)-based real-time system implementation. In addition, the time-synchronization of the feedback control loop is another vital aspect concerning sampling time for the discrete-time controller. This paper presents an FPGA-based design and development of a permanent magnet synchronous motor (PMSM) drive system considering the impact of time-synchronization corresponding to the sampling time criteria for a feedback control loop. Furthermore, the repercussion of time-synchronization is examined for the transient conditions due to a step change in load as well as motor speed. The field-oriented control (FOC) of the PMSM drive system is designed and implemented for the system authentication using a digital model integration approach provided by the Xilinx system generator (XSG) and VIVADO platform. Moreover, harmonic distortion in the motor current is considered for an in-depth analysis of the system performance corresponding to sampling time as well as switching frequencies.
ISSN:2079-9292
2079-9292
DOI:10.3390/electronics9111906