Proposal of an Adaptive Fault Tolerance Mechanism to Tolerate Intermittent Faults in RAM

Due to transistor shrinking, intermittent faults are a major concern in current digital systems. This work presents an adaptive fault tolerance mechanism based on error correction codes (ECC), able to modify its behavior when the error conditions change without increasing the redundancy. As a case e...

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Bibliographic Details
Published in:Electronics (Basel) 2020-12, Vol.9 (12), p.2074
Main Authors: Baraza-Calvo, J.-Carlos, Gracia-Morán, Joaquín, Saiz-Adalid, Luis-J., Gil-Tomás, Daniel, Gil-Vicente, Pedro-J.
Format: Article
Language:English
Subjects:
Adaptive systems
Design
Digital systems
Error correction
Error correction & detection
Error detection
Fault detection
Fault tolerance
Manufacturing
Microprocessors
Power consumption
Random access memory
Reconfiguration
Redundancy
RISC
Transistors
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Summary:Due to transistor shrinking, intermittent faults are a major concern in current digital systems. This work presents an adaptive fault tolerance mechanism based on error correction codes (ECC), able to modify its behavior when the error conditions change without increasing the redundancy. As a case example, we have designed a mechanism that can detect intermittent faults and swap from an initial generic ECC to a specific ECC capable of tolerating one intermittent fault. We have inserted the mechanism in the memory system of a 32-bit RISC processor and validated it by using VHDL simulation-based fault injection. We have used two (39, 32) codes: a single error correction–double error detection (SEC–DED) and a code developed by our research group, called EPB3932, capable of correcting single errors and double and triple adjacent errors that include a bit previously tagged as error-prone. The results of injecting transient, intermittent, and combinations of intermittent and transient faults show that the proposed mechanism works properly. As an example, the percentage of failures and latent errors is 0% when injecting a triple adjacent fault after an intermittent stuck-at fault. We have synthesized the adaptive fault tolerance mechanism proposed in two types of FPGAs: non-reconfigurable and partially reconfigurable. In both cases, the overhead introduced is affordable in terms of hardware, time and power consumption.
ISSN:2079-9292
2079-9292
DOI:10.3390/electronics9122074