Schottky-Embedded Silicon-Controlled Rectifier With High Holding Voltage Realized in a 0.18-μm Low-Voltage CMOS Process

• Published in: IEEE transactions on electron devices 2021-04, Vol.68 (4), p.1764-1771
• Main Authors: Chang, Rong-Kun, Peng, Bo-Wei, Ker, Ming-Dou
• Format: Article
• Language: English
• Subjects: Cathodes; Circuit protection; CMOS; Current measurement; Electric potential; Electrostatic discharge (ESD); Electrostatic discharges; Integrated circuits; Junctions; Latch-up; Layout; Schottky barrier diode (SBD); Schottky diodes; Schottky-embedded modified lateral silicon-controlled rectifier (SMLSCR); Silicon; silicon controlled rectifier (SCR); Silicon controlled rectifiers; Static electricity; Temperature measurement; Voltage; Voltage measurement
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2021.3059193

The silicon-controlled rectifier (SCR) has been reported to protect CMOS integrated circuits (ICs), due to high ESD robustness within a small silicon area. However, the holding voltage ( {V}_{h}{)} of the SCR device was too low to suffer the latch-up issue. Thus, the {V}_{h} value of the SCR device must be improved to be greater than the circuit operating voltage for safe applications. In this work, the Schottky-embedded modified lateral SCR (SMLSCR) with high holding voltage for ESD protection was proposed and verified in a 0.18- \boldsymbol \mu \text{m} 1.8-V/3.3-V CMOS process. By using the Schottky barrier junction, the {V}_{h} value of the SCR device can be improved by the reverse-bias Schottky barrier diode (SBD) that is embedded into the SCR device structure. Among those experimental results on the SMLSCR devices with split layout parameters in the silicon test chip, the SMLSCR device without \text{P}^{+} guard ring has the best second breakdown current ( {I}_{{t{2}}}{)} of 3.1 A and a high {V}_{h} value of 9.7 V.