Fault Simulation and Formal Analysis in Functional Safety CPU FMEDA Campaign

In accordance with safety requirements of industrial control, a functional safety CPU is designed targeting controller IC used in State Grid. Functional safety verification flow based on FMEDA is setup for the project, which totally comply with IEC61508. In this paper, fault injection with fault sim...

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Bibliographic Details
Published in:Journal of physics. Conference series 2021-01, Vol.1769 (1), p.12061
Main Authors: Yang, Xueying, Zhao, Dongyan, Jiang, Yichu, Zhang, Xige, Yuan, Yidong
Format: Article
Language:English
Subjects:
Control systems design
Failure analysis
Formal method
Physics
Safety
Verification
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Summary:In accordance with safety requirements of industrial control, a functional safety CPU is designed targeting controller IC used in State Grid. Functional safety verification flow based on FMEDA is setup for the project, which totally comply with IEC61508. In this paper, fault injection with fault simulation and formal analysis flow of functional safety verification is introduced in detail, which is set up for calculation of diagnose coverage on random hardware failure. Employment of formal method completes 2-3 weeks fault analysis in 52 hours, which improved diagnose coverage convergence.
ISSN:1742-6588
1742-6596
DOI:10.1088/1742-6596/1769/1/012061