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Internal Task-Aware Command Scheduling to Improve Read Performance of Embedded Flash Storage Systems

Many NAND flash storage systems access flash memories by generating flash commands to process input/output (I/O) requests from a host system. Because the order in which flash commands are processed affects the I/O performance, command scheduling has been performed in previous studies to prioritize f...

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Bibliographic Details
Published in:IEEE access 2021, Vol.9, p.71638-71650
Main Authors: Lee, Gyeongyong, Kwak, Jaewook, Jeong, Joonyong, Lee, Daeyong, Jang, Moonseok, Choi, Jungwook, Song, Yong Ho
Format: Article
Language:English
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Summary:Many NAND flash storage systems access flash memories by generating flash commands to process input/output (I/O) requests from a host system. Because the order in which flash commands are processed affects the I/O performance, command scheduling has been performed in previous studies to prioritize flash read commands for improving the read performance. However, in addition to the flash commands for accessing user data requested by the host, flash commands for internal tasks that improve the I/O performance and operation efficiency of the flash storage are issued. Particularly in embedded flash storage, the flash commands by the map cache management have a significant influence on the latency of I/O requests. The processing time of the I/O request depends on the execution time of the flash commands for mapping information and the flash commands for user data. In this paper, we propose command scheduling to improve read performance to address the occurrence of map flash commands. Priority is given to the flash read and program command from the read request, and among these commands, the flash command originating from the read request, which has a shorter processing time, is executed first. Consequently, the waiting time of the flash command is reduced, thereby improving the read latency. Experiments conducted with real workloads show that the proposed scheduling scheme reduces the average read latency by up to 51% compared with the existing scheduling scheme and demonstrates an effective performance improvement in a small map cache.
ISSN:2169-3536
2169-3536
DOI:10.1109/ACCESS.2021.3079520