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The Merged Voltage Follower: A Class-AB CMOS Follower With Enhanced Bandwidth to Drive Loads With Low Resistance and Large Capacitance
In this article, a new CMOS voltage follower, with class AB output, derived by merging the super follower and the flipped voltage follower, is introduced. The resulting cell exhibits lower output impedance than its predecessors. Expressions for the behavior of the proposed follower are derived and v...
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Published in: | Canadian journal of electrical and computer engineering 2021-01, Vol.44 (1), p.30 |
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Main Authors: | , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Online Access: | Get full text |
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Summary: | In this article, a new CMOS voltage follower, with class AB output, derived by merging the super follower and the flipped voltage follower, is introduced. The resulting cell exhibits lower output impedance than its predecessors. Expressions for the behavior of the proposed follower are derived and verified by circuit simulations in Eldo using the C5N CMOS process models available through The MOSIS Service. The conducted analysis shows an improved performance of the presented circuit with respect to the flipped- and super followers. To prove the principle, a test cell was fabricated in the mentioned technology and characterized. Measurement results show quasi-symmetric rising and falling edges and a gain–bandwidth product of 32 MHz with a load capacitance of 47 pF. The power consumption of the cell is [Formula Omitted] with 2-V supply. |
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ISSN: | 0840-8688 |
DOI: | 10.1109/ICJECE.2020.3018421 |