A Compact 5 GHz Power Amplifier Using a Spiral Transformer for Enhanced Power Supply Rejection in 180-nm CMOS Technology

• Published in: Electronics (Basel) 2019-09, Vol.8 (9), p.1043
• Main Authors: Choe, Young-Joe, Nam, Hyohyun, Park, Jung-Dong
• Format: Article
• Language: English
• Subjects: Baluns; CMOS; Design; Efficiency; Energy conversion efficiency; Power amplifiers; Power consumption; Power gain; Power supply; Push-pull amplifiers; Receivers & amplifiers; Rejection; Transformers; Wireless communications
• ISSN: 2079-9292; 2079-9292
• DOI: 10.3390/electronics8091043

We present a compact 5 GHz, class A power amplifier (PA) applicable for a wireless combo-chip that supports multiple radio systems in 180 nm CMOS technology. The proposed two-stage linear PA consists of a cascode input stage with a transformer-based balun, combined with a balancing capacitor as the load, where the single-ended signal is converted into the balanced output and a second-stage, class A push–pull amplifier with another transformer-based balun, which efficiently combines the output power differentially to drive a single-ended 50 Ω load. The proposed single-ended PA with an internal balanced configuration can achieve a power supply rejection ratio of 9.5 to 65.9 dB at 0.1 to 3.5 GHz, which is around a 12 to 37 dB improvement compared to a conventional single-ended PA with the same power gain. The results show that the proposed PA has a gain of 15.5 dB, an output-referred 1 dB gain compression point of 13 dBm, an output intercept point of 22 dBm with a 5 MHz frequency offset, an output saturated power of 15.4 dBm, and a peak power-added efficiency of 15%. The implemented PA consumes a DC current of 72 mA under 1.8 V supply. The core chip size is 0.65 mm2 without pads.