A new approach to eliminate impacts of high-resistance faults by compensation of traditional distance relays’ input signals

• Published in: Electric power systems research 2021-05, Vol.194, p.107098, Article 107098
• Main Author: Abdollahzadeh, Hamed
• Format: Article
• Language: English
• Subjects: Circuits; Distance relaying; Fault diagnosis; Fault distance estimation; Faults; High-resistance faults; Impact resistance; Instrument transformers; Parallel transmission lines; Relay; Relay ground elements; Relay input signals compensation; Response time; Signal processing; Simulation; Transmission lines
• ISSN: 0378-7796; 1873-2046
• DOI: 10.1016/j.epsr.2021.107098

•Proposed approach deals with the problem of HRFs in distance protection.•It is particularly targeted at the distance protection of parallel lines.•The relay input signals are compensated by the proposed approach to overcome HRFs.•The compensation process would not threaten the security feature of the relay.•The proposed approach insignificantly influences the relay response time. Ground impedance measuring elements of digital distance relays, responsible for line to ground faults, are highly prone to underreach in case of high-resistance faults. To tackle this problem for the distance protection of parallel transmission lines, this paper presents an effective approach by compensating the input signals to the existent traditional distance relays. For this objective, the fault distance is estimated innovatively within a short duration by analyzing the line sequence networks in time domain. The fault distance is employed to generate the signals compensating the under-operation distance relays’ instantaneous input signals measured by instrument transformers, in a way as to eliminate the high fault resistance-caused underreach. The proposed approach would not threaten the relay security in normal operating conditions, irrelevant-circuit and external faults. Further, it would not interfere with the relay phase elements. Performance of the proposed approach is examined through comprehensive simulation studies conducted in PSCAD/ EMTDC for a variety of influencing situations and the results would reveal that the proposed approach is able to fully prevent underreach incidents arising from high-resistance faults, without having a significant impact on the relay response time.