A BIST Scheme for Bootstrapped Switches

This paper proposes a built-in self-test (BIST) scheme for detecting catastrophic faults in bootstrapped switches. The clock signal and the gate voltage of the sampling MOS transistor are taken as the observation signals in the proposed BIST scheme. Usually, the gate voltage of the sampling MOS tran...

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Bibliographic Details
Published in:Electronics (Basel) 2021-07, Vol.10 (14), p.1661
Main Authors: Tang, Xiao-Bin, Tachibana, Masayoshi
Format: Article
Language:English
Subjects:
Circuits
Electric potential
Fault detection
Fault diagnosis
MOS devices
Power supply
Sampling
Self tests
Semiconductor devices
Simulation
Switches
Transistors
Voltage
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Summary:This paper proposes a built-in self-test (BIST) scheme for detecting catastrophic faults in bootstrapped switches. The clock signal and the gate voltage of the sampling MOS transistor are taken as the observation signals in the proposed BIST scheme. Usually, the gate voltage of the sampling MOS transistor is greater than or equal to the supply voltage when the switch is turn on, and such a voltage is not suitable for observation. To solve this problem, a low power supply voltage is provided for the bootstrapped switch to obtain a suitable observation voltage. The proposed BIST scheme and the circuit under test (CUT) are realized with transistor level. The proposed BIST scheme was simulated by HSPICE. The simulated fault coverage is approximately 87.9% with 66 test circuits.
ISSN:2079-9292
2079-9292
DOI:10.3390/electronics10141661