Low-voltage dynamic comparator using positive feedback bulk effect on a floating inverter amplifier

• Published in: Analog integrated circuits and signal processing 2021-09, Vol.108 (3), p.511-524
• Main Authors: Canal, Bruno, Klimach, Hamilton D., Bampi, Sergio, Balen, Tiago R.
• Format: Article
• Language: English
• Subjects: Amplifiers; Capacitors; Circuits; Circuits and Systems; CMOS; Electrical Engineering; Engineering; Low voltage; Noise; Positive feedback; Power consumption; Reservoirs; Signal,Image and Speech Processing; Threshold voltage; Transconductance; Transistors
• ISSN: 0925-1030; 1573-1979
• DOI: 10.1007/s10470-021-01891-2

This work presents the design of a low voltage dynamic comparator for low-power ADC applications. The dynamic comparator uses a pre-amplifier powered by a floating reservoir capacitor and a positive feedback bulk structure. The output stage comprises a simple circuit to reduce the total voltage overhead necessary to define the logic levels. The powering scheme of the pre-amplifier, with a floating reservoir capacitor, contributes to reduce the impacts of global process variability. The positive feedback bulk structure lowers the threshold voltages of the pre-amplifier transistors at the sampling phase. Such structure also provides positive feedback signal during the comparison phase to provide extra transconductance. The proposed dynamic comparator is designed and simulated in a 28 nm CMOS technology and reaches an IRN below of the quantization noise of a 10 bits differential ADCs working with 600 mV power supply. The dynamic comparator achieves 237 μV input-referred noise, while consuming only 38.8 fJ per comparison and having a nominal delay of 5.77 ns.