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Parallel computation of power system EMTs through Polyphase-QMF filter banks

•An introduction of a new EMT simulation method to speeding up statistical studies.•Computations can be carried out in parallel and can be executed hundreds of times faster than real-time.•Parallelism is independent of network topology and time-delay elements.•The method does not involve rational ap...

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Bibliographic Details
Published in:Electric power systems research 2021-08, Vol.197, p.107317, Article 107317
Main Authors: Zuluaga, J.R., Naredo, J.L., Castañón, L.J., Vega, M., Ramos-Leaños, O.
Format: Article
Language:English
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Summary:•An introduction of a new EMT simulation method to speeding up statistical studies.•Computations can be carried out in parallel and can be executed hundreds of times faster than real-time.•Parallelism is independent of network topology and time-delay elements.•The method does not involve rational approximations and it is free of passivity-violation problems.•Convolutions involved are paralleled through of polyphase-QMF filter banks. The analysis of electromagnetic transients in power systems often requires intensive computations. Various methods have been proposed to reduce execution times and computational costs. A new technique is proposed here in which the system model is synthesized in the Laplace domain and is simulated in the time domain through long convolutions. The nodal matrix of the system under analysis is reduced by Kron's method to leave only the nodes related to observations and to changes in explicit form. State vectors derived from the reduced matrix are convolved with auxiliary signals to simulate transient events and the convolutions are performed in parallel by an algorithm based on polyphase QMF filter-banks. The proposed technique is applied in the simulation of a transient on a 17-bus network. The obtained results are compared with those from PSCAD / EMTDC and from the conventional Laplace Transform. Finally, the suitability of this technique for parallel processing is demonstrated by a basic implementation on an FPGA.
ISSN:0378-7796
1873-2046
DOI:10.1016/j.epsr.2021.107317