A 6 GHz Integrated High-Efficiency Class-F−1 Power Amplifier in 65 nm CMOS Achieving 47.8% Peak PAE

This paper reports a “single-transistor” Class-F−1 power amplifier (PA) in 65 nm CMOS, which operates at the microwave center frequency of 6 GHz. The PA is loaded with a Class-F−1 harmonic control network, employing a new “parasitic-aware” topology deduced using a novel iterative algorithm. A dual-p...

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Bibliographic Details
Published in:Electronics (Basel) 2021-10, Vol.10 (20), p.2450
Main Authors: Ali, Syed Muhammad Ammar, Hasan, S. M. Rezaul
Format: Article
Language:English
Subjects:
Algorithms
CMOS
Design
Efficiency
Frequencies
Harmonic control
Impedance matching
Iterative algorithms
Millimeter waves
Power amplifiers
Topology
Transistors
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Summary:This paper reports a “single-transistor” Class-F−1 power amplifier (PA) in 65 nm CMOS, which operates at the microwave center frequency of 6 GHz. The PA is loaded with a Class-F−1 harmonic control network, employing a new “parasitic-aware” topology deduced using a novel iterative algorithm. A dual-purpose output matching network is designed, which not only serves the purpose of output impedance matching, but also reinforces the harmonic control of the Class-F−1 harmonic network. This proposed PA yields a peak power-added efficiency (PAE) of 47.8%, which is one of the highest when compared to previously reported integrated microwave/millimeter-wave PAs in CMOS and SiGe technologies. The amplifier shows a saturated output power of 14.4 dBm along with an overall gain of 13.8 dB.
ISSN:2079-9292
2079-9292
DOI:10.3390/electronics10202450