Understanding the Interplay Between CdSe Thickness and Cu Doping Temperature in CdSe/CdTe Devices

CdSe thickness and Cu doping play significant roles in achieving high efficiency in CdTe solar cells. Using an evaporated CdSe/CdTe device stack to avoid vacuum breaks between deposition of layers, we investigated the role of the CdSe thickness on the device performance. When the CdSe thickness was...

Full description

Saved in:
Bibliographic Details
Published in:IEEE journal of photovoltaics 2022-01, Vol.12 (1), p.11-15
Main Authors: Bastola, Ebin, Phillips, Adam B., Barros-King, Griffin, Jamarkattel, Manoj K., Li, Deng-Bing, Quader, Abdul, Pokhrel, Dipendra, Friedl, Jared, Gibbs, Jacob M., Mathew, Xavier, Yan, Yanfa, Ellingson, Randy J., Heben, Michael J.
Format: Article
Language:English
Subjects:
Annealing
Cadmium compounds
Cadmium tellurides
CdTe
Circuits
Copper chloride
CuCl<named-content xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" content-type="math" xlink:type="simple"> <inline-formula> <tex-math notation="LaTeX"> 2</tex-math> </inline-formula> </named-content>
Doping
Energy & Fuels
evaporation
II-VI semiconductor materials
Intermetallic compounds
Materials Science
Performance evaluation
Photonic band gap
Photovoltaic cells
Photovoltaic systems
photovoltaics
Physics
Short circuit currents
Solar cells
Thickness
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:CdSe thickness and Cu doping play significant roles in achieving high efficiency in CdTe solar cells. Using an evaporated CdSe/CdTe device stack to avoid vacuum breaks between deposition of layers, we investigated the role of the CdSe thickness on the device performance. When the CdSe thickness was greater than a critical value the device performance suffered primarily due to a reduction in the short-circuit current density (J SC ). The critical thickness of CdSe was determined to be 120 nm. However, in some cases the CdSe thicknesses could be increased to larger values by increasing the Cu doping process temperature. The higher temperature process leads to an increase in J SC and an overall improvement in device efficiency. Specifically, for a device with ∼270 nm of CdSe, the J SC increased from 7.9 mAcm −2 with CuCl 2 processing temperature of 200°C to ∼29 mAcm −2 when the processing temperature was increased to 250°C.
ISSN:2156-3381
2156-3403
DOI:10.1109/JPHOTOV.2021.3110338