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Semiconductor final-test scheduling under setup operator constraints
We consider a semiconductor final-test scheduling problem that aims at minimizing the total weighted tardiness. In contrast to previous studies on this problem, we explicitly take account of the need to assign human operators to setup operations. We present decomposition-based heuristic solution app...
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Published in: | Computers & operations research 2022-02, Vol.138, p.105619, Article 105619 |
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Main Authors: | , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | We consider a semiconductor final-test scheduling problem that aims at minimizing the total weighted tardiness. In contrast to previous studies on this problem, we explicitly take account of the need to assign human operators to setup operations. We present decomposition-based heuristic solution approaches and a mixed integer program. In a computational study based on real-world problem instances that mimic settings at our industry partner, we show that our heuristics clearly outperform a standard solver when computational time is limited. Based on this result, we provide decision support for managers by analyzing the capability and effect of rescheduling jobs in the presence of a highly dynamic environment with frequently changing customer requests and common test machine failures.
•We consider a semiconductor final-test scheduling problem.•In contrast to previous studies, it explicitly takes account of setup operators.•We present heuristic solution approaches based on a decomposition of the problem.•The approaches outperform the current procedure used at our industry partner.•We provide detailed managerial implications that result from our study. |
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ISSN: | 0305-0548 1873-765X 0305-0548 |
DOI: | 10.1016/j.cor.2021.105619 |