Hardware Design with Real-Time Implementation for Security of Medical Images and EPMR

• Published in: Circuits, systems, and signal processing systems, and signal processing, 2022-02, Vol.41 (2), p.867-891
• Main Authors: Ghosh, Sudip, Bhateja, Yuvam, Palathinkal, Joshua Roy, Rahaman, Hafizur
• Format: Article
• Language: English
• Subjects: Algorithms; Circuits; Circuits and Systems; Computed tomography; Confidentiality; Cryptography; Digital watermarks; Electrical Engineering; Electronics and Microelectronics; Embedded systems; Encryption; Engineering; Field programmable gate arrays; Hamming codes; Hardware; Instrumentation; Magnetic resonance imaging; Medical imaging; Medical records; Power consumption; Prototypes; Real time; Resource utilization; Security; Signal processing; Signal,Image and Speech Processing; Tomography; Wavelet transforms
• ISSN: 0278-081X; 1531-5878
• DOI: 10.1007/s00034-021-01807-5

In this article, an FPGA-based hardware prototype design has been proposed and implemented in real time for the security of the Electronic Patient Medical Record. This proposed hardware can be integrated into various medical image scanning instruments like X-ray, ultrasonography, magnetic resonance imaging, and computed tomography machines, which can embed the health record of a patient into his/her scanned medical images in real time. The FPGA prototype was implemented using Xilinx Spartan-3E FPGA. The hardware resource utilization results have been observed to be low and practically viable. High operating speed up to 245 MHz (for joint embedding-cum-encryption process) and up to 252 MHz (for joint decoding-cum-decryption process) is achieved, with a respective low power consumption of 95 mW and 82 mW. Extracting the medical data is possible using a key, generated within the proposed algorithm using the patient’s fingerprint. The proposed hardware architecture is the first architecture for the algorithm proposed in this article to the best of our knowledge.