Subthreshold reference circuit with curvature compensation based on the channel length modulation of MOS devices

• Published in: International journal of circuit theory and applications 2022-04, Vol.50 (4), p.1082-1100
• Main Author: Aminzadeh, Hamed
• Format: Article
• Language: English
• Subjects: Circuits; CMOS; current reference; Curvature; Design parameters; Electric power supplies; high‐order curvature compensation; Modulation; MOS devices; Reference signals; subthreshold; Taylor series; temperature coefficient (TC); Temperature compensation; Temperature dependence; temperature nonlinearity; Threshold voltage; voltage reference
• ISSN: 0098-9886; 1097-007X
• DOI: 10.1002/cta.3201

A subthreshold nano‐power voltage and current reference with high‐order temperature compensation is proposed by taking advantage of the channel length modulation of MOS devices. Curvature compensation is implemented by providing proper compensating drain‐source voltages for the core devices of a first‐order CMOS reference such that the output nonlinear temperature factors can be compensated over a wide temperature range. In‐depth mathematical analysis is carried out to model the temperature dependency of the reference signals before and after compensation. As part of the analysis, Taylor expansion of the threshold voltage of MOS devices has been evaluated in a generalized fashion, enabling to clarify the complicated relationship between the high‐order temperature‐related terms of the output and design parameters. Simulated in a standard 0.18‐μm CMOS process, the minimum supply voltage of a proof‐of‐concept design is 1.0 V, providing 345 mV voltage reference with minimum temperature coefficient (TC) of 2.0 ppm/°C across the range of –40–140°C. The active area is 0.45 mm2 with around 200 nA current consumption. The DC line regulation is 0.23%/V, and the power supply rejection ratio (PSRR) is −63 dB at 10 Hz. Compensation of the nonlinear temperature‐dependent factors of voltage and current generators has always been a challenge in CMOS technology. In this paper, we proposed a nano‐power voltage and current reference with high‐order temperature compensation by taking advantage of the channel length modulation of MOS devices. To this end, proper compensating voltages are applied to the drain terminal of the core devices such that nonlinear temperature factors can be compensated over a wide temperature range. In‐depth mathematical analysis is carried out to model the temperature dependence of the output before and after compensation. As part of the analysis, Taylor expansion of the threshold voltage of MOS devices has been evaluated in a generalized fashion, enabling to determine the complicated relationship between the high‐order temperature terms and design parameters.