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CNTFET based inductance simulator circuits employing single CFOA and its filter applications
The purpose of this paper is to design novel inductance simulator topologies using 32 nm carbon nanotube field effect transistor (CNTFET) technology. In a CMOS CFOA structure, we replaced MOS transistors by CNFETs and determined the optimum tube numbers of CNTFET for proper operation. We used four d...
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Published in: | Analog integrated circuits and signal processing 2022, Vol.111 (2), p.235-242 |
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Main Authors: | , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | The purpose of this paper is to design novel inductance simulator topologies using 32 nm carbon nanotube field effect transistor (CNTFET) technology. In a CMOS CFOA structure, we replaced MOS transistors by CNFETs and determined the optimum tube numbers of CNTFET for proper operation. We used four different inductance simulator topologies including single CNTFET CFOA and minimum number of passive components to realize inductance. We selected one of the simulator topology and used in a filter circuit. It is seen that the filter circuit with the inductance simulator topology successfully operated as LP (Low pass) filter. The proposed inductance simulator can reach around 100 MHz cut off frequency. The filters cut-off frequency is around 300 kHz. Chip area reduction 1474 times compared to CMOS CFOA circuit can be achieved. The power consumption of CNTFET CFOA inductance simulator is 4,3mW while CMOS counterpart’s power consumption is 20 mW. The slew rate of CNTFET CFOA is 227 V/µs while CMOS CFOA is 40 V/µs. |
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ISSN: | 0925-1030 1573-1979 |
DOI: | 10.1007/s10470-022-02000-7 |