Linking Room- and Low-Temperature Electrical Performance of MOS Gate Stacks for Cryogenic Applications

Based on MOSFETs with four different gate stacks, we extract the oxide trap density and transconductance from the low frequency noise and DC transfer characteristics at room temperature, respectively. With the same gate stacks, Hall mobility as a function of carrier density is and the critical densi...

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Bibliographic Details
Published in:IEEE electron device letters 2022-05, Vol.43 (5), p.674-677
Main Authors: Kao, K.-H., Godfrin, C., Elsayed, A., Li, R., Simoen, E., Grill, A., Kubicek, S., Radu, I. P., Govoreanu, B.
Format: Article
Language:English
Subjects:
Carrier density
Cryogenic engineering
cryogenic MOSFET
Cryogenic temperature
Cryogenics
Electron mobility
Hall effect
hall measurement
High performance computing
LF noise
Logic gates
Low temperature
MOS devices
MOSFET
MOSFETs
quantum computing
Qubit
Room temperature
Silicon
Stacks
Tin
Transconductance
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Description
Summary:Based on MOSFETs with four different gate stacks, we extract the oxide trap density and transconductance from the low frequency noise and DC transfer characteristics at room temperature, respectively. With the same gate stacks, Hall mobility as a function of carrier density is and the critical density is extracted at low temperatures. These physical quantities are analyzed and correlated explicitly, offering a method to qualitatively compare the quality of the four gate stacks for cryogenic MOS devices, and providing further insight into the material physics at cryogenic temperatures.
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2022.3162368