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Design and implementation of arrhythmic ECG signals for biomedical engineering applications on FPGA

In this study, eight arrhythmic ECG signals from vital signals [sinus tachycardia, supraventricular tachycardia, premature ventricular complex (PVC), atrial fibrillation, AV block: 3rd degree, ventricular fibrillation, sinus bradycardia, first-degree AV block] were designed mathematically, and then...

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Bibliographic Details
Published in:The European physical journal. ST, Special topics Special topics, 2022-06, Vol.231 (5), p.869-884
Main Authors: Karataş, F., Koyuncu, İ., Tuna, M., Alçın, M., Avcioglu, E., Akgul, A.
Format: Article
Language:English
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Summary:In this study, eight arrhythmic ECG signals from vital signals [sinus tachycardia, supraventricular tachycardia, premature ventricular complex (PVC), atrial fibrillation, AV block: 3rd degree, ventricular fibrillation, sinus bradycardia, first-degree AV block] were designed mathematically, and then modelled on FPGA by VHDL and Xilinx-Vivado software. The mathematical extrapolation of the signals was created in accordance with the literature and after examining the time and amplitude values of many ECG signals from the Physiobank ATM section of the MIT-BIH (Massachusetts Institute of Technology-Beth Israel Hospital) arrhythmia database. These signals were synthesized for the Zynq-7000 XC7Z020 FPGA chip for using in biomedical calibration applications and ECG simulators. The ECG signals were modelled with a 14-bit AD9767 DAC module that worked in coherence with this development board, and observed in real-time by 4 channel oscilloscope. Matlab-based ECG signals were taken as reference and compared with the results obtained from the FPGA-based ECG signals design. The FPGA chip resource consumption values obtained after the place–route process, the test results obtained from the design, the MSE (mean squared error) values of the designed signals, the operating frequencies of the system and each signal have been presented. The maximum operating speed of this system is 651.827 MHz. In this study, it has been shown that FPGA-based ECG signal generation system can be implemented on FPGA chips, and the designed system can be safely used in ECG simulators.
ISSN:1951-6355
1951-6401
DOI:10.1140/epjs/s11734-021-00334-3