LADRC Based Digital Control DC-DC ASIC Design

The Internet of Things (IoT) systems require power management modules to have the characteristics of low power consumption, high conversion efficiency, high integration, stable output, and good dynamic response. Due to its ease of tuning and superior control performance, linear active disturbance re...

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Bibliographic Details
Published in:Journal of physics. Conference series 2022-06, Vol.2290 (1), p.12074
Main Authors: Zhang, Wangdong, Fan, Bo, Lu, Chao, Liu, Huimin
Format: Article
Language:English
Subjects:
Active control
Algorithms
Buck converters
Controllers
Dynamic response
Electric potential
Hardware
Internet of Things
Physics
Power consumption
Power management
Proportional integral derivative
Voltage
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Summary:The Internet of Things (IoT) systems require power management modules to have the characteristics of low power consumption, high conversion efficiency, high integration, stable output, and good dynamic response. Due to its ease of tuning and superior control performance, linear active disturbance rejection control (LADRC) is an attractive design option. Yet, to date, due to its high complexity, LADRC has been used in software systems, while little effort has been made in its hardware implementation. In this work, we investigate and explore efficient hardware implementation of the LADRC algorithm. A fully integrated digital LADRC controller for DC-DC Buck converters is synthesized with UMC 55 nm CMOS process. Its input voltage is 5V, stable output voltage is 2V, and rated operating current is 100mA. To our best knowledge, this is the first work to implement LADRC algorithms in hardware. Simulation results show that the LADRC controller is superior to the PID controller in the terms of start-up time, line regulation, load regulation.
ISSN:1742-6588
1742-6596
DOI:10.1088/1742-6596/2290/1/012074