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A Normally-Off GaN MIS-HEMT Fabricated Using Atomic Layer Etching to Improve Device Performance Uniformity for High Power Applications
Normally-off ferroelectric charge trap gate stack GaN high electron mobility transistor (FEG-HEMT) was fabricated with atomic layer etching (ALE) to precisely control the device parameters including \text {V}_{\text {th}} of the device. The ALE process consists of cyclic Cl2 adsorption modificatio...
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Published in: | IEEE electron device letters 2022-10, Vol.43 (10), p.1629-1632 |
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Main Authors: | , , , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | Normally-off ferroelectric charge trap gate stack GaN high electron mobility transistor (FEG-HEMT) was fabricated with atomic layer etching (ALE) to precisely control the device parameters including \text {V}_{\text {th}} of the device. The ALE process consists of cyclic Cl2 adsorption modification steps and the Ar ion removal steps. The ALE process achieved etch-per-cycle (EPC) of 0.347 nm/cycle and superior etching morphology with RMS =0.281 nm. The fabricated GaN HEMT using the ALE process exhibited a high threshold voltage ( \text {V}_{\text {th}} ) of 5.06 V, high maximum drain current ( \text {I}_{\text {D,MAX}} ) of 772 mA/mm with low on-resistance ( \text {R}_{\text {on}} ) of 8.57~\Omega \cdot \text {mm} and high breakdown voltage (BV) of 888 V, the device also showed good \text {V}_{\text {th}} uniformity. Finally, the contact resistance ( \text {R}_{\text {c}} ) was reduced from 0.46~\Omega \cdot \text {mm} to 0.15~\Omega \cdot \text {mm} by the ALE process, and the dynamic on-resistance (dyn- \text {R}_{\text {on}} ) was improved at the same time. |
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ISSN: | 0741-3106 1558-0563 |
DOI: | 10.1109/LED.2022.3201900 |