Radiation studies performed on the High Luminosity ATLAS TileCal link Daughterboard

The new electronics of the ATLAS Tile Calorimeter for the HL-LHC interfaces the on-detector and off-detector electronics by means of a Daughterboard. The Daughterboard is positioned on-detector featuring commercial SFPs+, CERN GBTx ASICs, ProASIC FPGAs and Kintex Ultrascale FPGAs. The design minimiz...

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Bibliographic Details
Published in:arXiv.org 2023-03
Main Authors: Eduardo Valdes Santurio, Silverstein, Samuel, Dunne, Katherine, Bohm, Christian, Motzkau, Holger, Clement, Christophe, Lee, Suhyun
Format: Article
Language:English
Subjects:
Circuits
Data transfer (computers)
Daughterboards
Electronics
Field programmable gate arrays
Large Hadron Collider
Luminosity
Radiation damage
Redundancy
Soft errors
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Summary:The new electronics of the ATLAS Tile Calorimeter for the HL-LHC interfaces the on-detector and off-detector electronics by means of a Daughterboard. The Daughterboard is positioned on-detector featuring commercial SFPs+, CERN GBTx ASICs, ProASIC FPGAs and Kintex Ultrascale FPGAs. The design minimizes single points of failure and mitigates radiation damage by means of a double redundant scheme, Triple Mode Redundancy, Xilinx Soft Error Mitigation IP, CRC/FEC for link data transfer, and SEL protection circuitry. We present an updated summary of the TID, NIEL and SEE qualification tests, and performance studies of the Daughterboard revision 6 design.
ISSN:2331-8422
DOI:10.48550/arxiv.2210.08661