Design and Implementation of Bridgeless AC/DC PFC Sepic Converter with Valley-Fill Circuit

• Published in: IOP conference series. Materials Science and Engineering 2022-10, Vol.1258 (1), p.12058
• Main Authors: Praba, B Lakshmi, Seyezhai, R
• Format: Article
• Language: English
• Subjects: Bridgeless SEPIC; Circuits; Conduction losses; Harmonic distortion; Inductance; Passive components; PFC (Power Factor Correction); Power factor; Ripple; Ripples; THD; Topology; Valley-Fill (VFC); Valleys; Voltage converters (DC to DC)
• ISSN: 1757-8981; 1757-899X
• DOI: 10.1088/1757-899X/1258/1/012058

The continuous requirement to improve power quality has motivated the proposal of several PFC circuit topologies. The conventional AC/DC SEPIC has increased conduction loss due to the presence of bridge rectifier. In order to reduce the conduction loss and to improve the efficiency this research work deals with a bridgeless SEPIC (single ended primary inductance converter) AC/DC PFC integrated valley-fill circuit (VFC). The number of components is reduced compared to the existing topologies. The bridgeless topology results in reduced conduction loss, reduced current stress and improved system performance compared with the traditional SEPIC and the existing topologies. The circuit configuration of the suggested topology has been simulated using MATLAB/SIMULINK. The functional parameters of the projected AC/DC integrated VFC is compared with the conventional SEPIC (Con-SEPIC), con-SEPIC integrated VFC and bridgeless SEPIC in terms of passive component count, output voltage ripple, input current ripple, supply power factor, Total Harmonic Distortion. From the simulation outcomes, it is concluded that the bridgeless topology provides high power factor, reduced ripple and reduced supply current harmonics. The results are validated.