An Automatic Circuit Design Framework for Level Shifter Circuits

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems 2022-12, Vol.41 (12), p.5169-5181
• Main Authors: Hong, Jiwoo, Kim, Sunghoon, Jeon, Dongsuk
• Format: Article
• Language: English
• Subjects: Algorithms; Analog circuits; Circuit design; Circuit design automation; Circuit reliability; Circuit simulation; Circuit topology; Circuits; Deep learning; Design automation; Digital systems; evolutionary algorithm; Evolutionary computation; level shifter; Machine learning; Reinforcement learning; reinforcement learning (RL); Semiconductor devices; Topology optimization; Transistors
• ISSN: 0278-0070; 1937-4151
• DOI: 10.1109/TCAD.2022.3155444

Although design automation is a key enabler of modern large-scale digital systems, automating the transistor-level circuit design process still remains a challenge. Some recent works suggest that deep learning algorithms could be adopted to find optimal transistor dimensions in relatively small circuitry such as analog amplifiers. However, those approaches are not capable of exploring different circuit structures to meet the given design constraints. In this work, we propose an automatic circuit design framework that can generate practical circuit structures from scratch as well as optimize the size of each transistor, considering performance and reliability. We employ the framework to design level shifter circuits, and the experimental results show that the framework produces novel level shifter circuit topologies and the automatically optimized designs achieve 2.8\times - 5.3\times lower power-delay product (PDP) than prior arts designed by human experts.