Oversampling Techniques to Improve the Accuracy of Hardware-in-the-Loop Switching Models

• Published in: IEEE transactions on power electronics 2023-05, Vol.38 (5), p.6024-6035
• Main Authors: Yushkova, Marina, Sanchez, Alberto, de Castro, Angel
• Format: Article
• Language: English
• Subjects: Accuracy; Buck converters; Computational modeling; Field programmable gate arrays; Field programmable gate arrays (FPGA); Hardware; hardware in the loop (HIL); Numerical models; Oversampling; Power converters; power electronics; Pulse width modulation; real-time simulation; Switches; Switching; switching converter
• ISSN: 0885-8993; 1941-0107
• DOI: 10.1109/TPEL.2023.3243702

Real-time hardware-in-the-loop implementations for power converters involve digital sampling of the on-off signals that are applied to the switches. The most basic way of considering it, is to process only one switch state during a simulation step. This usually causes an incorrect input reading because it can change during the step. The negative effects include the appearance of undesirable subharmonics and numerical inaccuracy. In this work, input signal oversampling is proposed. Thus, several switch states can be properly processed within the same simulation step. The question is how to use this additional information. This article proposes two oversampling approaches: 1) a sequential one, which is based on previous works, and 2) a parallel implementation, which is the main contribution of the article. The results obtained with these techniques are compared between them and with the model without oversampling, showing a significant increase in accuracy for both oversampling approaches around 98%. Although the accuracy is very similar in both methods, synthesis results for field programmable gate arrays implementation are clearly better for the parallel method, which can be easily adapted to process multiple switching events. The final experimental results show a great subharmonic decrease up to 99%.