A Multi-Band Impedance Matching Strategy Using Lumped Resonant Circuits

This paper presents a concurrent multi-band impedance matching network realized using multi-resonant circuits. The proposed scheme employs an equivalent LC and CL L-match networks alternately at the different frequency bands of interest. The proposed technique simplifies the design process and reali...

Full description

Saved in:
Bibliographic Details
Published in:Circuits, systems, and signal processing systems, and signal processing, 2023-03, Vol.42 (3), p.1369-1388
Main Authors: Mohan, Arun, Mondal, Saroj
Format: Article
Language:English
Subjects:
Circuit design
Circuits
Circuits and Systems
Electrical Engineering
Electronics and Microelectronics
Energy harvesting
Engineering
Frequencies
Impedance matching
Inductors
Insertion loss
Instrumentation
Maximum power transfer
Power amplifiers
Reflectance
Signal,Image and Speech Processing
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:This paper presents a concurrent multi-band impedance matching network realized using multi-resonant circuits. The proposed scheme employs an equivalent LC and CL L-match networks alternately at the different frequency bands of interest. The proposed technique simplifies the design process and realizes a matching network that employs n inductors and capacitors for an n-band impedance matching network. The synthesis technique has been demonstrated for designing a dual-band (953 MHz and 2.45 GHz) and triple-band (900 MHz, 1.8 GHz, and 2.45 GHz) matching networks using single- and dual-resonant circuits. The obtained results exhibit a reflection coefficient and insertion loss magnitude > 20 dB and < 1.1 dB, respectively. Design procedures for constructing dual- and multi-resonant circuits are provided for synthesizing a triple- and multi-band impedance matching network, respectively. The effect of circuit non-idealities on performance has been analyzed, and parasitic-aware design techniques to mitigate the non-idealities are discussed and compared in this paper. The proposed scheme can be used for impedance matching at the input of an LNA, output of a power amplifier, or ensuring maximum power transfer in an RF energy harvesting system.
ISSN:0278-081X
1531-5878
DOI:10.1007/s00034-022-02195-0