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A 9-to-42-GHz High-Gain Low-Noise Amplifier Using Coupled Interstage Feedback in 0.15- \mu m GaAs pHEMT Technology

This article presents a 3-stage millimeter-wave low-noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) design for broadband applications. The proposed structure consists of cascading common-source (CS) LNA with coupled interstage feedback (CIF) paths at the second and third stages....

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Bibliographic Details
Published in:IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2023-04, Vol.70 (4), p.1-13
Main Authors: Yan, Xu, Luo, Haorui, Zhang, Jingyuan, Gao, Si-Ping, Guo, Yongxin
Format: Article
Language:English
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Summary:This article presents a 3-stage millimeter-wave low-noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) design for broadband applications. The proposed structure consists of cascading common-source (CS) LNA with coupled interstage feedback (CIF) paths at the second and third stages. By tuning the coupling factor and the inductance of the CIF, enhanced overall gain and extended working bandwidth can be achieved simultaneously. The proposed CIF formed by a simple on-chip edge-coupled parallel metal-lines features small size and high flexibility. To facilitate circuit design and optimization, an equivalent circuit for the proposed CIF structure is developed. Besides, to address the trade-off between impedance matching and noise performance, a noise matching strategy focusing more on higher frequencies is presented to achieve good noise performance. With the proposed techniques, an LNA prototype is demonstrated in a commercial 0.15- \mu m GaAs E-mode pHEMT process. The fabricated LNA has a die size of 1.15 mm ^2 and DC power consumption of 109 mW. The measurement results show a peak gain of 25.6 dB with a 3-dB bandwidth of 9 \sim 42 GHz, the minimal noise figure (NF) of 1.91 dB, a group delay of 68.7 \pm 20.5 ps, and 20.8 dBm best OIP3 under 2.0-V VDD.
ISSN:1549-8328
1558-0806
DOI:10.1109/TCSI.2023.3238391