Hardware Architecture for Realtime HEVC Intra Prediction

Researchers have, in recent times, achieved excellent compression efficiency by implementing a more complicated compression algorithm due to the rapid development of video compression. As a result, the next model of video compression, High-Efficiency Video Coding (HEVC), provides high-quality video...

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Published in:Electronics (Basel) 2023-04, Vol.12 (7), p.1705
Main Authors: Lam, Duc Khai, Nguyen, Pham The Anh, Tran, Tuan Anh
Format: Article
Language:English
Subjects:
Algorithms
Coding standards
Complexity
Data compression
Energy efficiency
Field programmable gate arrays
Frames per second
Hardware
High definition
Image coding
Methods
Prediction theory
Real time
Time compression
Video compression
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Nguyen, Pham The Anh
Tran, Tuan Anh
description Researchers have, in recent times, achieved excellent compression efficiency by implementing a more complicated compression algorithm due to the rapid development of video compression. As a result, the next model of video compression, High-Efficiency Video Coding (HEVC), provides high-quality video output while requiring less bandwidth. However, implementing the intra-prediction technique in HEVC requires significant processing complexity. This research provides a completely pipelined hardware architecture solution capable of real-time compression to minimize computing complexity. All prediction unit sizes of 4×4, 8×8, 16×16, and 32×32, and all planar, angular, and DC modes are supported by the proposed solution. The synthesis results mapped to Xilinx Virtex 7 reveal that our solution can do real-time output with 210 frames per second (FPS) at 1920×1080 resolution, called Full High Definition (FHD), or 52 FPS at 3840×2160 resolution, called 4K, while operating at 232 Mhz maximum frequency.
doi_str_mv 10.3390/electronics12071705
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subjects Algorithms
Coding standards
Complexity
Data compression
Energy efficiency
Field programmable gate arrays
Frames per second
Hardware
High definition
Image coding
Methods
Prediction theory
Real time
Time compression
Video compression
title Hardware Architecture for Realtime HEVC Intra Prediction
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