Dual-Band 802.11ax Transceiver Design With 1024-QAM and 160-MHz CBW Support

A [Formula Omitted]ax transceiver design is presented to support dual-band simultaneous operation (DBS) and 1024-QAM modulation. The proposed architecture features linearity enhancement for uplink orthogonal frequency division multiple access (OFDMA) and wideband transmission. With integrated low-ph...

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Published in:IEEE solid-state circuits letters 2023, Vol.6, p.137-140
Main Authors: Lu, Chao, Chen, Shr-Lung, Liu, Jun, Bao, Jian, Wang, Yufei, Zhao, Yi
Format: Article
Language:English
Subjects:
Frequency division multiple access
Narrowband
Noise generation
Orthogonal Frequency Division Multiplexing
Phase locked loops
Phase noise
Quadrature amplitude modulation
Receiving
Sensitivity
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cites cdi_FETCH-LOGICAL-c273t-208e4e4ca773dc33d3cfe593ffba6ce285443bb411b3b06450366a4d5abd21213
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creator Lu, Chao
Chen, Shr-Lung
Liu, Jun
Bao, Jian
Wang, Yufei
Zhao, Yi
description A [Formula Omitted]ax transceiver design is presented to support dual-band simultaneous operation (DBS) and 1024-QAM modulation. The proposed architecture features linearity enhancement for uplink orthogonal frequency division multiple access (OFDMA) and wideband transmission. With integrated low-phase noise clock generation and phase locked loop (PLL), best-in-class receiving sensitivity and lowest transmission EVM floor are demonstrated through measurements. With 20-MHz (HE20) receiving, −96.5/−66 dBm sensitivity level is measured for MSC0/11, respectively. The output power reaches 18 dBm with −35-dB EVM for 80 MHz 1024-QAM (HE80 MCS11) transmission at 5-GHz band. Narrowband OFDMA signals can be transmitted at full power capacity, and 160-MHz channel bandwidth (CBW) can also be supported without digital predistortion (DPD). The fully integrated transceiver occupies 10.5-mm2 silicon area in 22-nm CMOS.
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fullrecord <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_journals_2809894374</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>2809894374</sourcerecordid><originalsourceid>FETCH-LOGICAL-c273t-208e4e4ca773dc33d3cfe593ffba6ce285443bb411b3b06450366a4d5abd21213</originalsourceid><addsrcrecordid>eNpNkEFLwzAYhoMoOOZ-gLeA584v-dK0PW6dOnFDZJMdQ5qm2jHbmrSi_npbtoOn9z08vC88hFwzmDIGye1qs0mnHDhOkcuYoTwjIx5GGCQS8PxfvyQT7_cAwBImEeIReVp0-hDMdZXTGHg_p7_p1unKG1t-WUcX1pdvFd2V7TtlwEXwMlvTgWYSgvXyl6bzHd10TVO79opcFPrg7eSUY_J6f7dNl8Hq-eExna0CwyNsAw6xFVYYHUWYG8QcTWHDBIsi09JYHodCYJYJxjLMQIoQUEot8lBnOWec4ZjcHHcbV3921rdqX3eu6i8VjyGJE4GR6Cl2pIyrvXe2UI0rP7T7UQzUoE0N2tSgTZ204R_kI1sL</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2809894374</pqid></control><display><type>article</type><title>Dual-Band 802.11ax Transceiver Design With 1024-QAM and 160-MHz CBW Support</title><source>IEEE Electronic Library (IEL) Journals</source><creator>Lu, Chao ; Chen, Shr-Lung ; Liu, Jun ; Bao, Jian ; Wang, Yufei ; Zhao, Yi</creator><creatorcontrib>Lu, Chao ; Chen, Shr-Lung ; Liu, Jun ; Bao, Jian ; Wang, Yufei ; Zhao, Yi</creatorcontrib><description>A [Formula Omitted]ax transceiver design is presented to support dual-band simultaneous operation (DBS) and 1024-QAM modulation. The proposed architecture features linearity enhancement for uplink orthogonal frequency division multiple access (OFDMA) and wideband transmission. With integrated low-phase noise clock generation and phase locked loop (PLL), best-in-class receiving sensitivity and lowest transmission EVM floor are demonstrated through measurements. With 20-MHz (HE20) receiving, −96.5/−66 dBm sensitivity level is measured for MSC0/11, respectively. The output power reaches 18 dBm with −35-dB EVM for 80 MHz 1024-QAM (HE80 MCS11) transmission at 5-GHz band. Narrowband OFDMA signals can be transmitted at full power capacity, and 160-MHz channel bandwidth (CBW) can also be supported without digital predistortion (DPD). The fully integrated transceiver occupies 10.5-mm2 silicon area in 22-nm CMOS.</description><identifier>ISSN: 2573-9603</identifier><identifier>EISSN: 2573-9603</identifier><identifier>DOI: 10.1109/LSSC.2023.3268136</identifier><language>eng</language><publisher>Piscataway: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</publisher><subject>Frequency division multiple access ; Narrowband ; Noise generation ; Orthogonal Frequency Division Multiplexing ; Phase locked loops ; Phase noise ; Quadrature amplitude modulation ; Receiving ; Sensitivity</subject><ispartof>IEEE solid-state circuits letters, 2023, Vol.6, p.137-140</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2023</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c273t-208e4e4ca773dc33d3cfe593ffba6ce285443bb411b3b06450366a4d5abd21213</citedby><cites>FETCH-LOGICAL-c273t-208e4e4ca773dc33d3cfe593ffba6ce285443bb411b3b06450366a4d5abd21213</cites><orcidid>0000-0001-5736-054X</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,780,784,4022,27922,27923,27924</link.rule.ids></links><search><creatorcontrib>Lu, Chao</creatorcontrib><creatorcontrib>Chen, Shr-Lung</creatorcontrib><creatorcontrib>Liu, Jun</creatorcontrib><creatorcontrib>Bao, Jian</creatorcontrib><creatorcontrib>Wang, Yufei</creatorcontrib><creatorcontrib>Zhao, Yi</creatorcontrib><title>Dual-Band 802.11ax Transceiver Design With 1024-QAM and 160-MHz CBW Support</title><title>IEEE solid-state circuits letters</title><description>A [Formula Omitted]ax transceiver design is presented to support dual-band simultaneous operation (DBS) and 1024-QAM modulation. The proposed architecture features linearity enhancement for uplink orthogonal frequency division multiple access (OFDMA) and wideband transmission. With integrated low-phase noise clock generation and phase locked loop (PLL), best-in-class receiving sensitivity and lowest transmission EVM floor are demonstrated through measurements. With 20-MHz (HE20) receiving, −96.5/−66 dBm sensitivity level is measured for MSC0/11, respectively. The output power reaches 18 dBm with −35-dB EVM for 80 MHz 1024-QAM (HE80 MCS11) transmission at 5-GHz band. Narrowband OFDMA signals can be transmitted at full power capacity, and 160-MHz channel bandwidth (CBW) can also be supported without digital predistortion (DPD). The fully integrated transceiver occupies 10.5-mm2 silicon area in 22-nm CMOS.</description><subject>Frequency division multiple access</subject><subject>Narrowband</subject><subject>Noise generation</subject><subject>Orthogonal Frequency Division Multiplexing</subject><subject>Phase locked loops</subject><subject>Phase noise</subject><subject>Quadrature amplitude modulation</subject><subject>Receiving</subject><subject>Sensitivity</subject><issn>2573-9603</issn><issn>2573-9603</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2023</creationdate><recordtype>article</recordtype><recordid>eNpNkEFLwzAYhoMoOOZ-gLeA584v-dK0PW6dOnFDZJMdQ5qm2jHbmrSi_npbtoOn9z08vC88hFwzmDIGye1qs0mnHDhOkcuYoTwjIx5GGCQS8PxfvyQT7_cAwBImEeIReVp0-hDMdZXTGHg_p7_p1unKG1t-WUcX1pdvFd2V7TtlwEXwMlvTgWYSgvXyl6bzHd10TVO79opcFPrg7eSUY_J6f7dNl8Hq-eExna0CwyNsAw6xFVYYHUWYG8QcTWHDBIsi09JYHodCYJYJxjLMQIoQUEot8lBnOWec4ZjcHHcbV3921rdqX3eu6i8VjyGJE4GR6Cl2pIyrvXe2UI0rP7T7UQzUoE0N2tSgTZ204R_kI1sL</recordid><startdate>2023</startdate><enddate>2023</enddate><creator>Lu, Chao</creator><creator>Chen, Shr-Lung</creator><creator>Liu, Jun</creator><creator>Bao, Jian</creator><creator>Wang, Yufei</creator><creator>Zhao, Yi</creator><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0001-5736-054X</orcidid></search><sort><creationdate>2023</creationdate><title>Dual-Band 802.11ax Transceiver Design With 1024-QAM and 160-MHz CBW Support</title><author>Lu, Chao ; Chen, Shr-Lung ; Liu, Jun ; Bao, Jian ; Wang, Yufei ; Zhao, Yi</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c273t-208e4e4ca773dc33d3cfe593ffba6ce285443bb411b3b06450366a4d5abd21213</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2023</creationdate><topic>Frequency division multiple access</topic><topic>Narrowband</topic><topic>Noise generation</topic><topic>Orthogonal Frequency Division Multiplexing</topic><topic>Phase locked loops</topic><topic>Phase noise</topic><topic>Quadrature amplitude modulation</topic><topic>Receiving</topic><topic>Sensitivity</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Lu, Chao</creatorcontrib><creatorcontrib>Chen, Shr-Lung</creatorcontrib><creatorcontrib>Liu, Jun</creatorcontrib><creatorcontrib>Bao, Jian</creatorcontrib><creatorcontrib>Wang, Yufei</creatorcontrib><creatorcontrib>Zhao, Yi</creatorcontrib><collection>CrossRef</collection><collection>Electronics &amp; Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE solid-state circuits letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Lu, Chao</au><au>Chen, Shr-Lung</au><au>Liu, Jun</au><au>Bao, Jian</au><au>Wang, Yufei</au><au>Zhao, Yi</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Dual-Band 802.11ax Transceiver Design With 1024-QAM and 160-MHz CBW Support</atitle><jtitle>IEEE solid-state circuits letters</jtitle><date>2023</date><risdate>2023</risdate><volume>6</volume><spage>137</spage><epage>140</epage><pages>137-140</pages><issn>2573-9603</issn><eissn>2573-9603</eissn><abstract>A [Formula Omitted]ax transceiver design is presented to support dual-band simultaneous operation (DBS) and 1024-QAM modulation. The proposed architecture features linearity enhancement for uplink orthogonal frequency division multiple access (OFDMA) and wideband transmission. With integrated low-phase noise clock generation and phase locked loop (PLL), best-in-class receiving sensitivity and lowest transmission EVM floor are demonstrated through measurements. With 20-MHz (HE20) receiving, −96.5/−66 dBm sensitivity level is measured for MSC0/11, respectively. The output power reaches 18 dBm with −35-dB EVM for 80 MHz 1024-QAM (HE80 MCS11) transmission at 5-GHz band. Narrowband OFDMA signals can be transmitted at full power capacity, and 160-MHz channel bandwidth (CBW) can also be supported without digital predistortion (DPD). The fully integrated transceiver occupies 10.5-mm2 silicon area in 22-nm CMOS.</abstract><cop>Piscataway</cop><pub>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</pub><doi>10.1109/LSSC.2023.3268136</doi><tpages>4</tpages><orcidid>https://orcid.org/0000-0001-5736-054X</orcidid></addata></record>
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subjects Frequency division multiple access
Narrowband
Noise generation
Orthogonal Frequency Division Multiplexing
Phase locked loops
Phase noise
Quadrature amplitude modulation
Receiving
Sensitivity
title Dual-Band 802.11ax Transceiver Design With 1024-QAM and 160-MHz CBW Support
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-12T18%3A58%3A14IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Dual-Band%20802.11ax%20Transceiver%20Design%20With%201024-QAM%20and%20160-MHz%20CBW%20Support&rft.jtitle=IEEE%20solid-state%20circuits%20letters&rft.au=Lu,%20Chao&rft.date=2023&rft.volume=6&rft.spage=137&rft.epage=140&rft.pages=137-140&rft.issn=2573-9603&rft.eissn=2573-9603&rft_id=info:doi/10.1109/LSSC.2023.3268136&rft_dat=%3Cproquest_cross%3E2809894374%3C/proquest_cross%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-c273t-208e4e4ca773dc33d3cfe593ffba6ce285443bb411b3b06450366a4d5abd21213%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_pqid=2809894374&rft_id=info:pmid/&rfr_iscdi=true