A low output ripple and high security on‐chip voltage regulation based on Fourier transform

• Published in: International journal of circuit theory and applications 2023-06, Vol.51 (6), p.2578-2591
• Main Authors: Cheng, Jiafeng, Liu, Wenrui, Sun, Nengyuan, Peng, Zhaokang, Sun, Caiban, Wang, Chunyang, Bi, Yijian, Wen, Yiming, Zhang, Hongliu, Zhang, Pengcheng, Yu, Weize
• Format: Article
• Language: English
• Subjects: Algorithms; Amplitudes; Control algorithms; Control theory; Fourier transform; Fourier transforms; Integrated circuits; Multiphase; Optimization; output ripple; Power efficiency; Randomness; Ripples; Security; Sequences; switched‐capacitor (SC) voltage converter; Transient response; Voltage converters; Workload; Workloads
• ISSN: 0098-9886; 1097-007X
• DOI: 10.1002/cta.3571

Summary In modern integrated circuits (ICs), integrating workload‐agnostic multiphase switched‐capacitor (SC) voltage converters on‐chip is an effective way to reduce the transient response time, improve the security, and boost the power efficiency. However, a stochastic and unbalanced active sequence within the multiphase SC converter may undermine the corresponding output voltage ripple significantly. In this paper, a novel algorithm that is based on Fourier transform is capable of efficiently mitigating the amplitude of output ripple without compromising its security drastically. To achieve this objective, firstly, the output ripple of a single‐phase SC converter needs to be approximated with a Fourier expansion. Then the relationship between the output ripple and active phase sequence of a multiphase SC converter can be modeled precisely under the assistance of Fourier transform. After maximizing the randomness of the active sequences of the multiphase SC converter under different workload conditions and filtering a certain number of phase sequences with unsatisfied output ripples, the optimum control algorithm is generated. As shown in the result, the amplitude of output ripple of a multiphase SC converter can be reduced by 69.5% with negligible security loss and less than 29% power and area overhead under the 55 nm process design kits (PDK). A traditional on‐chip multiphase switched‐capacitor (SC) converter may achieve a power efficiency, a low response time, and a high security against differential power analysis (DPA) attacks under the assistance of a pseudo‐random number generator. Unfortunately, the amplitude of the output ripple of the SC converter may be drastically jeopardized due to effect of generated unsatisfactory random sequences. A Fourier transform‐based novel algorithm is proposed to filter the unsatisfactory random sequences without causing much overhead.