Low-Thermal-Budget Ferroelectric Field-Effect Transistors Based on CuInP2S6 and InZnO

In this paper, we demonstrate low-thermal-budget ferroelectric field-effect transistors (FeFETs) based on two-dimensional ferroelectric CuInP2S6 (CIPS) and oxide semiconductor InZnO (IZO). The CIPS/IZO FeFETs exhibit non-volatile memory windows of ~1 V, low off-state drain currents, and high carrier...

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Bibliographic Details
Published in:arXiv.org 2023-07
Main Authors: Ryu, Hojoon, Kang, Junzhe, Park, Minseong, Bae, Byungjoon, Zhao, Zijing, Rakheja, Shaloo, Lee, Kyusang, Zhu, Wenjuan
Format: Article
Language:English
Subjects:
Budgets
CMOS
Current carriers
Ferroelectric materials
Ferroelectricity
Field effect transistors
Handwriting recognition
Neural networks
Semiconductor devices
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Summary:In this paper, we demonstrate low-thermal-budget ferroelectric field-effect transistors (FeFETs) based on two-dimensional ferroelectric CuInP2S6 (CIPS) and oxide semiconductor InZnO (IZO). The CIPS/IZO FeFETs exhibit non-volatile memory windows of ~1 V, low off-state drain currents, and high carrier mobilities. The ferroelectric CIPS layer serves a dual purpose by providing electrostatic doping in IZO and acting as a passivation layer for the IZO channel. We also investigate the CIPS/IZO FeFETs as artificial synaptic devices for neural networks. The CIPS/IZO synapse demonstrates a sizeable dynamic ratio (125) and maintains stable multi-level states. Neural networks based on CIPS/IZO FeFETs achieve an accuracy rate of over 80% in recognizing MNIST handwritten digits. These ferroelectric transistors can be vertically stacked on silicon CMOS with a low thermal budget, offering broad applications in CMOS+X technologies and energy-efficient 3D neural networks.
ISSN:2331-8422