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Reachability Analysis for Nonlinear Analog/Mixed-Signal Circuits with Trajectory-Based Reachable Sets
This paper presents an efficient and scalable reachability analysis algorithm for nonlinear analog/mixed-signal circuits. In particular, it addresses the challenges in computing the time evolution of the reachable set of the circuit's continuous states and its intersection with the guard planes...
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Published in: | IEEE access 2023-01, Vol.11, p.1-1 |
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description | This paper presents an efficient and scalable reachability analysis algorithm for nonlinear analog/mixed-signal circuits. In particular, it addresses the challenges in computing the time evolution of the reachable set of the circuit's continuous states and its intersection with the guard planes, i.e., the partitioning planes of the equivalent piecewise-linear system modeling the circuit's dynamics. The proposed algorithm utilizes a trajectory form of the reachable set, which can describe its exact evolution over time using analytical expressions until the set crosses one of the guard planes of the system. When it does, a naive computation of the reachable set may require splitting the set into multiple sub-sets, each using its own trajectory form. This is problematic since the number of reachable sets may grow over time indefinitely. To mitigate this, this work proposes a way of processing a group of reachable sets together that cross a common guard plane during a finite time interval. This method can keep the number of sets and the associated computational cost constant over time. The experimental results with a DC-DC converter example demonstrate that the proposed algorithm can achieve the average speed-ups of 79-107× compared to the existing algorithms with errors of less than 2%. |
doi_str_mv | 10.1109/ACCESS.2023.3295825 |
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In particular, it addresses the challenges in computing the time evolution of the reachable set of the circuit's continuous states and its intersection with the guard planes, i.e., the partitioning planes of the equivalent piecewise-linear system modeling the circuit's dynamics. The proposed algorithm utilizes a trajectory form of the reachable set, which can describe its exact evolution over time using analytical expressions until the set crosses one of the guard planes of the system. When it does, a naive computation of the reachable set may require splitting the set into multiple sub-sets, each using its own trajectory form. This is problematic since the number of reachable sets may grow over time indefinitely. To mitigate this, this work proposes a way of processing a group of reachable sets together that cross a common guard plane during a finite time interval. This method can keep the number of sets and the associated computational cost constant over time. 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In particular, it addresses the challenges in computing the time evolution of the reachable set of the circuit's continuous states and its intersection with the guard planes, i.e., the partitioning planes of the equivalent piecewise-linear system modeling the circuit's dynamics. The proposed algorithm utilizes a trajectory form of the reachable set, which can describe its exact evolution over time using analytical expressions until the set crosses one of the guard planes of the system. When it does, a naive computation of the reachable set may require splitting the set into multiple sub-sets, each using its own trajectory form. This is problematic since the number of reachable sets may grow over time indefinitely. To mitigate this, this work proposes a way of processing a group of reachable sets together that cross a common guard plane during a finite time interval. This method can keep the number of sets and the associated computational cost constant over time. The experimental results with a DC-DC converter example demonstrate that the proposed algorithm can achieve the average speed-ups of 79-107× compared to the existing algorithms with errors of less than 2%.</description><subject>Algorithms</subject><subject>Analog circuits</subject><subject>Analog/mixed-signal circuits</subject><subject>Evolution</subject><subject>guard intersection</subject><subject>hybrid systems</subject><subject>Mathematical analysis</subject><subject>Merging</subject><subject>piecewise-linear system</subject><subject>Random access memory</subject><subject>Reachability analysis</subject><subject>safe operating area</subject><subject>Safety</subject><subject>safety verification</subject><subject>Time-domain analysis</subject><subject>Trajectory</subject><subject>Transforms</subject><subject>Voltage converters (DC to DC)</subject><issn>2169-3536</issn><issn>2169-3536</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2023</creationdate><recordtype>article</recordtype><sourceid>ESBDL</sourceid><sourceid>DOA</sourceid><recordid>eNpNUU1P4zAQjVasBAJ-wXKIxDltxnYS-1giYJH4kLbs2Ro7k-IqW4OdCvrv1yUVYi4z8zTvjWZelv2CcgZQqvmiba-XyxkrGZ9xpirJqh_ZCYNaFbzi9dG3-jg7j3FdppAJqpqTjP4Q2hc0bnDjLl9scNhFF_Peh_zRbwa3IQyfsF_NH9wHdcXSrVKbty7YrRtj_u7Gl_w54Jrs6MOuuMJIXX6QHShf0hjPsp89DpHOD_k0-3tz_dz-Lu6fbu_axX1heaXGwlhAaxWaxsq6gXRL3clKcdNL2bAeWKVAGOC8sSgU6yzI2jQCVYNUS2D8NLubdDuPa_0a3D8MO-3R6U_Ah5XGMDo7kEaoiStI63ohiIM0TJSmr2zJGmGUSFqXk9Zr8G9biqNe-21Ip0fNpNi_VCiepvg0ZYOPMVD_tRVKvbdHT_bovT36YE9iXUwsR0TfGCCFgJr_B2_kiwo</recordid><startdate>20230101</startdate><enddate>20230101</enddate><creator>Kim, Seyoung</creator><creator>Kim, Jaeha</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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In particular, it addresses the challenges in computing the time evolution of the reachable set of the circuit's continuous states and its intersection with the guard planes, i.e., the partitioning planes of the equivalent piecewise-linear system modeling the circuit's dynamics. The proposed algorithm utilizes a trajectory form of the reachable set, which can describe its exact evolution over time using analytical expressions until the set crosses one of the guard planes of the system. When it does, a naive computation of the reachable set may require splitting the set into multiple sub-sets, each using its own trajectory form. This is problematic since the number of reachable sets may grow over time indefinitely. To mitigate this, this work proposes a way of processing a group of reachable sets together that cross a common guard plane during a finite time interval. This method can keep the number of sets and the associated computational cost constant over time. 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subjects | Algorithms Analog circuits Analog/mixed-signal circuits Evolution guard intersection hybrid systems Mathematical analysis Merging piecewise-linear system Random access memory Reachability analysis safe operating area Safety safety verification Time-domain analysis Trajectory Transforms Voltage converters (DC to DC) |
title | Reachability Analysis for Nonlinear Analog/Mixed-Signal Circuits with Trajectory-Based Reachable Sets |
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