CMOS Tunable Pseudo-Resistor with Low Harmonic Distortion

In this work, a tunable pseudo-resistor was designed, simulated, and tested using a 0.35 µm CMOS technology. The proposal used a compact voltage bias circuit free of body-effect, allowing a constant resistance value over the pseudo-resistor’s dynamic range, improving its linearity. A fabricated cell...

Full description

Saved in:
Bibliographic Details
Published in:Electronics (Basel) 2023-08, Vol.12 (16), p.3376
Main Authors: Molinar-Solis, Jesus E., Padilla-Cantoya, Ivan, Ocampo-Hidalgo, Juan J., Sandoval-Perez, Sergio, Rivera-Mejia, Jose
Format: Article
Language:English
Subjects:
Circuits
CMOS
Complementary metal oxide semiconductors
Design and construction
Harmonic distortion
Resistors
Simulation
Transistors
Citations: Items that this one cites
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:In this work, a tunable pseudo-resistor was designed, simulated, and tested using a 0.35 µm CMOS technology. The proposal used a compact voltage bias circuit free of body-effect, allowing a constant resistance value over the pseudo-resistor’s dynamic range, improving its linearity. A fabricated cell was characterized providing a resistance value from 300 kΩ to 10 GΩ with a THD from
ISSN:2079-9292
2079-9292
DOI:10.3390/electronics12163376