New technique to extend the vertical depletion region at SOI-LDMOSFETs

In order to obtain an excellent performance for silicon-on-insulator lateral double-diffused MOSFET (SOI-LDMOSFET) transistors, we introduce a new technique to extend the depletion region along the vertical direction in the drift region. The proposed structure is called vertically depleted LDMOSFET...

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Bibliographic Details
Published in:Journal of computational electronics 2017-09, Vol.16 (3), p.666-675
Main Authors: Mansoori, Hojjat Allah, Orouji, Ali A., Dideban, A.
Format: Article
Language:English
Subjects:
Breakdown
Buried structures
Density
Depletion
Doping
Drift
Electric fields
Electric potential
Electrical Engineering
Engineering
Mathematical and Computational Engineering
Mathematical and Computational Physics
Mechanical Engineering
Optical and Electronic Materials
Silicon wafers
Simulation
SOI (semiconductors)
Theoretical
Voltage
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Summary:In order to obtain an excellent performance for silicon-on-insulator lateral double-diffused MOSFET (SOI-LDMOSFET) transistors, we introduce a new technique to extend the depletion region along the vertical direction in the drift region. The proposed structure is called vertically depleted LDMOSFET (VD-LDMOSFET). The VD-LDMOSFET structure consists of a buried metal layer in the oxide region. The drift region of the VD-LDMOSFET is vertically depleted, not only from the buried oxide, but also by the incorporated metal layer in the buried oxide. Therefore, a higher drift doping density is achieved by an extension of the depletion region in the drift region and the on-state resistance ( R ON ) reduces without degradation of the breakdown voltage. Also, an additional peak is created in the electric field distribution of the proposed structure and causes a reduction of the electric field peak near the gate and the drift region junction at the top surface of the device. Therefore, the breakdown voltage ( V BR ) of the VD-LDMOSFET structure increases. The simulation results illustrate that by optimizing the doping density of the drift region and the dimensions of the metal layer in the proposed structure, the on-state resistance (28.9%) and the breakdown voltage (36.1%) are improved greatly and a superior tradeoff is achieved compared with a conventional SOI-LDMOSFET (C-LDMOSFET) structure.
ISSN:1569-8025
1572-8137
DOI:10.1007/s10825-017-0994-7