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An efficient systolic array grid-based structure of the robust Bayesian regularization technique for real-time enhanced imaging in uncertain remote sensing environment

In this paper, we address a hardware implementation of the efficient robust Bayesian regularization architecture for the real-time enhancement of large-scale remote sensing (RS) imaging. The efficient sense of the proposed architecture is related to the high-performance embedded implementation that...

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Bibliographic Details
Published in:Journal of real-time image processing 2017-12, Vol.13 (4), p.783-796
Main Authors: Castillo Atoche, A., Carrasco Alvarez, R., Palma Marrufo, O., Vázquez Castillo, J.
Format: Article
Language:English
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Summary:In this paper, we address a hardware implementation of the efficient robust Bayesian regularization architecture for the real-time enhancement of large-scale remote sensing (RS) imaging. The efficient sense of the proposed architecture is related to the high-performance embedded implementation that is achieved with the aggregation of parallel computing and systolic array design techniques in a novel grid connected-based accelerator. Then, the developed high-speed accelerator is integrated with an embedded processor via the HW/SW co-design paradigm. The presented approach is used for solving RS image enhancement/reconstruction of the ill-conditioned inverse spatial spectrum pattern estimation problems via an interesting low-cost high-performance embedded computing solution. Finally, we show the achieved results and how we drastically reduced the computational load for real-world large-scale geospatial images.
ISSN:1861-8200
1861-8219
DOI:10.1007/s11554-014-0441-y