The TH Express high performance interconnect networks

• Published in: Frontiers of Computer Science 2014-06, Vol.8 (3), p.357-366
• Main Authors: PANG, Zhengbin, XIE, Min, ZHANG, Jun, ZHENG, Yi, WANG, Guibin, DONG, Dezun, SUO, Guang
• Format: Article
• Language: English
• Subjects: Computer Science; HPC; Low level; Message passing; network interface chip (NIC); Network latency; offload collective operation; Research Article; TH Express interconnect; 互连接口; 互连网络; 基础结构; 消息传递; 用户级通信; 直接存储器存取; 网络接口; 高性能计算机
• ISSN: 2095-2228; 2095-2236
• DOI: 10.1007/s11704-014-3500-9

Interconnection network plays an important role in scalable high performance computer （HPC） systems. The TH Express-2 interconnect has been used in MilkyWay-2 system to provide high-bandwidth and low-latency interprocessot communications, and continuous efforts are devoted to the development of our proprietary interconnect. This paper describes the state-of-the-art of our proprietary interconnect, especially emphasizing on the design of network interface. Several key features are introduced, such as user-level communication, remote direct memory access, offload collective operation, and hardware reliable end-to-end communication, etc. The design of a low level message passing infrastructures and an upper message passing services are also proposed. The preliminary performance results demonstrate the efficiency of the TH interconnect interface.