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A Novel Nanoscale SOI MOSFET by Using a P-N Junction and an Electrically Hole Free Region to Improve the Electrical Characteristics
In this paper, a SOI MOSFET is proposed using a P-N structure and an electrically hole-free region (EHFR-SOI). In this structure, to improve the electrical characteristics such as short channel effects, self-heating effects, and floating body effects, a Si 3 N 4 layer is used on the source side of t...
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Published in: | SILICON 2022-07, Vol.14 (11), p.5905-5912 |
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Main Authors: | , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | In this paper, a SOI MOSFET is proposed using a P-N structure and an electrically hole-free region (EHFR-SOI). In this structure, to improve the electrical characteristics such as short channel effects, self-heating effects, and floating body effects, a Si
3
N
4
layer is used on the source side of the SOI MOSFET
with
a P-N structure. The proposed technique converts the P-N structure to a N-P-N structure by creating an electrically hole-free region. So, by reducing the applied electric field to the carriers, a significant reduction in the electron temperature of the device will be created. Simulations and studies of the structure show that its thermal behavior is significantly improved. Also, the floating body effect, effective mobility, hot electron effect, and electric field in the structure are enhanced compared to a conventional SOI (C-SOI) structure. In addition, the gate-source and gate-drain capacitors have been improved, which indicates a higher switching speed of the structure. |
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ISSN: | 1876-990X 1876-9918 |
DOI: | 10.1007/s12633-021-01304-z |