Tapered Silicon Oxide Etching for Creation of Capacitor Structures for Measurement of Dielectric Characteristics

• Published in: Russian microelectronics 2023-12, Vol.52 (6), p.535-539
• Main Authors: Miakonkikh, A. V., Kuzmenko, V. O., Melnikov, A. E., Rudenko, K. V.
• Format: Article
• Language: English
• Subjects: Actinometry; Capacitors; Dielectric properties; Electrical Engineering; Engineering; Microfluidics; Photoresists; Plasma diagnostics; Plasma etching; Silicon dioxide; Silicon oxides
• ISSN: 1063-7397; 1608-3415
• DOI: 10.1134/S1063739723700695

The article develops the possibility of forming silicon oxide structures with tapered walls using dry etching methods, including a two-stage process involving the formation of a tapered photoresist mask and plasma etching of the silicon oxide. A study of the process of tapered resist etching was carried out. The influence of plasma parameters and composition on the etching process was studied, plasma diagnostics were carried out using Langmuir probe and optical emission actinometry methods, and the mechanisms of tapered resist etching were suggested. The etching process was optimized and structures with a resist thickness of 400 nm and a sidewall angle of up to 61° were obtained. A subsequent SiO 2 etching process allowed the slope of the resist to be transferred. The slope of the SiO 2 wall was 57°. The resulting structures with tapered SiO 2 walls make it possible to produce capacitors for studying the characteristics of dielectrics, as well as the structure of microelectromechanics and microfluidics.