Fabrication of the Highly Ordered Silicon Nanocone Array With Sub-5 nm Tip Apex by Tapered Silicon Oxide Mask

• Published in: IEEE transactions on semiconductor manufacturing 2024-05, Vol.37 (2), p.160-165
• Main Authors: Pan, Aixi, Zhu, Chenxu, Yan, Zheng, Zhu, Xiaoli, Liu, Zhongyi, Cui, Bo
• Format: Article
• Language: English
• Subjects: Electron beam lithography; Etchants; Etching; Lithography; Non-switching pseudo-Bosch process; Oxidation; Reactive ion etching; Si nanocone array; Silicon; Silicon compounds; Silicon dioxide; Silicon oxides; sub-5 nm tip; Substrates; Sulfur hexafluoride; tapered SiO₂ mask; wet etch; Wet etching
• ISSN: 0894-6507; 1558-2345
• DOI: 10.1109/TSM.2024.3372521

In view of the wide range of applications for ultra-sharp silicon (Si) nanocones, extensive research has been conducted on their fabrication processes. However, these conventional methods pose challenges in terms of achieving uniformity, controllability, and cost-efficiency. This study presents a novel approach to fabricating Si nanocone structures through reactive ion etching (RIE) using a tapered silicon dioxide mask, followed by thermal oxidation sharpening to reduce the apex diameter to 4 nm. Here the tapered SiO2 mask with a smooth sidewall was created through a combination of RIE and a buffered oxide etchant (BOE) etching. The lithography of the oxide mask is achieved using a cost-effective (compared to electron beam lithography) maskless aligner system (MLA). Subsequently, a non-switching pseudo-Bosch process, employing sulfur hexafluoride (SF6) gas and octafluorocyclobutane (C4F8) gas, is utilized for the etching the Si nanocone structures, resulting in an average apex diameter of 30 nm. Finally, thermal oxidation followed by oxide removal further sharpens these cones to 4 nm.