Integration of ferroelectric devices for advanced in-memory computing concepts

In this work the integration of ferroelectric (FE) devices for advanced in-memory computing applications is demonstrated based on the FeMFET memory cell concept. In contrast to FeFET having the FE layer directly embedded in the gate-stack, the FeMFET consists of a separated ferroelectric capacitor w...

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Bibliographic Details
Published in:Japanese Journal of Applied Physics 2024-05, Vol.63 (5), p.50802
Main Authors: Seidel, Konrad, Lehninger, David, Sünbül, Ayse, Hoffmann, Raik, Revello, Ricardo, Yadav, Nandakishor, Vardar, Alptekin, Landwehr, Matthias, Heinig, Andreas, Mähne, Hannes, Bernert, Kerstin, Thiem, Steffen, Kämpfe, Thomas, Lederer, Maximilian
Format: Article
Language:English
Subjects:
Arrays
Chips (memory devices)
Computation
FeFET
FeMFET
ferroelectric
Ferroelectric materials
Ferroelectricity
Knobs
memory
Memory devices
neuromorphic
Optimization
Superlattices
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Summary:In this work the integration of ferroelectric (FE) devices for advanced in-memory computing applications is demonstrated based on the FeMFET memory cell concept. In contrast to FeFET having the FE layer directly embedded in the gate-stack, the FeMFET consists of a separated ferroelectric capacitor which can be integrated in the chip-interconnect layers. Optimization of the FE material stack under such lower thermal budget constraints will be discussed as well as the significant performance improvement and reduction of variability by application of superlattice FE-stacks and further optimization knobs. The low memory state variability is important for accurate multiply-accumulate (MAC) operation. Such improvements are demonstrated on a memory array test chip including functional verification of MAC operation along a FeMFET-based array column with good accuracy over high dynamic current range.
ISSN:0021-4922
1347-4065
DOI:10.35848/1347-4065/ad3ce2