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Universal Quantum Gate Set for Gottesman-Kitaev-Preskill Logical Qubits

The realisation of a universal quantum computer at scale promises to deliver a paradigm shift in information processing, providing the capability to solve problems that are intractable with conventional computers. A key limiting factor of realising fault-tolerant quantum information processing (QIP)...

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Bibliographic Details
Published in:arXiv.org 2024-09
Main Authors: Matsos, V G, Valahu, C H, Millican, M J, Navickas, T, Kolesnikow, X C, Biercuk, M J, Tan, T R
Format: Article
Language:English
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Summary:The realisation of a universal quantum computer at scale promises to deliver a paradigm shift in information processing, providing the capability to solve problems that are intractable with conventional computers. A key limiting factor of realising fault-tolerant quantum information processing (QIP) is the large ratio of physical-to-logical qubits that outstrip device sizes available in the near future. An alternative approach proposed by Gottesman, Kitaev, and Preskill (GKP) encodes a single logical qubit into a single harmonic oscillator, alleviating this hardware overhead in exchange for a more complex encoding. Owing to this complexity, current experiments with GKP codes have been limited to single-qubit encodings and operations. Here, we report on the experimental demonstration of a universal gate set for the GKP code, which includes single-qubit gates and -- for the first time -- a two-qubit entangling gate between logical code words. Our scheme deterministically implements energy-preserving quantum gates on finite-energy GKP states encoded in the mechanical motion of a trapped ion. This is achieved by a novel optimal control strategy that dynamically modulates an interaction between the ion's spin and motion. We demonstrate single-qubit gates with a logical process fidelity as high as 0.960 and a two-qubit entangling gate with a logical process fidelity of 0.680. We also directly create a GKP Bell state from the oscillators' ground states in a single step with a logical state fidelity of 0.842. The overall scheme is compatible with existing hardware architectures, highlighting the opportunity to leverage optimal control strategies as a key accelerant towards fault tolerance.
ISSN:2331-8422