Heterogeneous Integration Technologies for Artificial Intelligence Applications

The rapid advancement of artificial intelligence (AI) has been enabled by semiconductor-based electronics. However, the conventional methods of transistor scaling are not enough to meet the exponential demand for computing power driven by AI. This has led to a technological shift toward system-level...

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Bibliographic Details
Published in:IEEE journal on exploratory solid-state computational devices and circuits 2024, Vol.10, p.89-97
Main Authors: Manley, Madison, Victor, Ashita, Park, Hyunggyu, Kaul, Ankit, Kathaperumal, Mohanalingam, Bakir, Muhannad S.
Format: Article
Language:English
Subjects:
Artificial intelligence
Artificial intelligence (AI)
Bandwidth
Chiplets
Computer architecture
Energy consumption
Glass
glass packaging
heterogeneous integration (HI)
Integrated circuit interconnections
Multichip modules
packaging
Silicon
Three-dimensional displays
Through-silicon vias
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Summary:The rapid advancement of artificial intelligence (AI) has been enabled by semiconductor-based electronics. However, the conventional methods of transistor scaling are not enough to meet the exponential demand for computing power driven by AI. This has led to a technological shift toward system-level scaling approaches, such as heterogeneous integration (HI). HI is becoming increasingly implemented in many AI accelerator products due to its potential to enhance overall system performance while also reducing electrical interconnect delays and energy consumption, which are critical for supporting data-intensive AI workloads. In this review, we introduce current and emerging HI technologies and their potential for high-performance systems. We then survey recent industrial and research progress in 3-D HI technologies that enable high bandwidth systems and finally present the emergence of glass core packaging for high-performance AI chip packages.
ISSN:2329-9231
2329-9231
DOI:10.1109/JXCDC.2024.3484958