Effect of geometry and temperature cycle on the reliability of WLCSP solder joints

The wafer level-chip-scale package (WLCSP) is designed to have external dimensions equal to that of the silicon device. This new package type is an extension of flip chip packaging technology to standard surface mount technology. The package has been targeted for low pin count (less than 30) and has...

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Bibliographic Details
Published in:IEEE transactions on components and packaging technologies 2005-09, Vol.28 (3), p.441-448
Main Authors: Chaparala, S.C., Roggeman, B.D., Pitarresi, J.M., Sammakia, B.G., Jackson, J., Griffin, G., McHugh, T.
Format: Article
Language:English
Subjects:
Cellular
Cellular phones
Darveaux model
finite element analysis
Flip chip
Geometry
microCSP
Nodular iron
Packages
Packaging
PDA
Personal digital assistants
Ramps
Silicon devices
solder joint reliability
Soldering
Solders
Surface-mount technology
Temperature distribution
Testing
Thermal cycling
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Description
Summary:The wafer level-chip-scale package (WLCSP) is designed to have external dimensions equal to that of the silicon device. This new package type is an extension of flip chip packaging technology to standard surface mount technology. The package has been targeted for low pin count (less than 30) and has high volume applications such as cellular phones, hand-held PDAs, etc. The WL-CSP is typically used without underfill and so solder joint reliability is a prime concern. Thus it is imperative to have a good understanding of the various design parameters of the package that affect the reliability of the solder joint. This paper presents the effect of geometrical parameters such as die size, die thickness, solder joint diameter and height on the reliability of solder joints. The effects of different dwell times, temperature range and ramp rates on the reliability of the solder joints is also studied by applying different temperature cycles to the package. A 16 I/O ADI WLCSP called MicroCSP is used as the primary test vehicle for the thermal cycling tests performed with different ramp/hold profiles. The energy-based model developed by Robert Darveaux is used to assess the reliability of solder joints.
ISSN:1521-3331
1557-9972
DOI:10.1109/TCAPT.2005.853589