An adaptive impedance tuning CMOS circuit for ISM 2.4-GHz band

• Published in: IEEE transactions on circuits and systems. 1, Fundamental theory and applications Fundamental theory and applications, 2005-06, Vol.52 (6), p.1115-1124
• Main Authors: Sjoblom, P., Sjoland, H.
• Format: Article
• Language: English
• Subjects: Adaptive arrays; Antenna tuning unit (ATU); bank; capacitor; capacitor bank; Ceramics; Circuit optimization; Circuit simulation; CMOS; Electrical Engineering, Electronic Engineering, Information Engineering; Elektroteknik och elektronik; Engineering and Technology; Frequency; Impedance; impedance matching; impedance tuning; impedance tuning unit (ITU); Inductors; ISM; reconfigurable matching; Shunt (electrical); switched capacitor; Switched capacitor circuits; Switching circuits; Teknik; unit (ITU)
• ISSN: 1549-8328; 1057-7122; 1558-0806
• DOI: 10.1109/TCSI.2005.849116

The difficulties encountered in matching an antenna to its optimal impedance are reduced with an adaptive 0.35-/spl mu/m CMOS circuit based on several switched shunt capacitors arranged in capacitor banks and on a few external series inductors. As high-quality inductors are difficult to obtain in CMOS, the inductors are placed either in an low-temperature cofired ceramic (LTCC) substrate or is a lumped component outside the core circuit. The circuits, presented here through a range of simulations, are optimized to function within the ISM 2.4-GHz band, but the general approach employed to improve matching can be used for other frequency bands as well. The circuits discussed provide a VSWR/spl les/2 match for every impedance with VSWR/spl les/5. There is a 1-dB power loss for a perfect 50 /spl Omega//spl rarr/50 /spl Omega/ transformation, a break-even point at VSWR=1.5, and a 3-dB increase in delivered power for VSWR= 4.3.