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Rewiring for watermarking digital circuit netlists
A resynthesis method to protect firm cores or circuit netlist representations is presented. The design is protected by embedding watermark by rewiring circuit with one or more redundancy addition/removal steps. This is the first known attempt to explore rewiring for watermarking. Area, performance,...
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Published in: | IEEE transactions on computer-aided design of integrated circuits and systems 2005-07, Vol.24 (7), p.1132-1137 |
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Main Authors: | , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | A resynthesis method to protect firm cores or circuit netlist representations is presented. The design is protected by embedding watermark by rewiring circuit with one or more redundancy addition/removal steps. This is the first known attempt to explore rewiring for watermarking. Area, performance, and testability requirements are preserved by the approach. We analyze several attack strategies and we experimentally demonstrate that the proof of authorship is guaranteed with very high probability for all ISCAS'85 benchmarks. |
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ISSN: | 0278-0070 1937-4151 |
DOI: | 10.1109/TCAD.2005.850855 |