Process-insensitive low-power design of switched-capacitor integrators

A generalized analytical technique is developed to design power optimized switched-capacitor integrators taking process variations into account. It is shown that the performance of a robustly designed power optimum switched-capacitor integrator is a monotonic function of the slew rate and the transc...

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Bibliographic Details
Published in:IEEE transactions on circuits and systems. 1, Fundamental theory and applications Fundamental theory and applications, 2004-10, Vol.51 (10), p.1940-1952
Main Authors: Naiknaware, R., Fiez, T.S.
Format: Article
Language:English
Subjects:
Analytical models
Circuits
Computer simulation
Design engineering
Design optimization
Fabrication
Foundries
Integrators
Mathematical analysis
Mathematical models
Monte Carlo methods
Optimization
Performance analysis
Power amplifiers
Process design
Robustness
SPICE
Transconductance
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Summary:A generalized analytical technique is developed to design power optimized switched-capacitor integrators taking process variations into account. It is shown that the performance of a robustly designed power optimum switched-capacitor integrator is a monotonic function of the slew rate and the transconductance of the amplifier. The framework provides an analytical solution for fabrication foundry independent analog design and therefore eliminates the need for Monte Carlo simulations to estimate the effect of the worst-case performance variations. With this analytical approach, it is possible to migrate the design to technologies with smaller feature sizes while obtaining monotonic improvement in the performance. The validity of the proposed analytical model for the design of robust switched-capacitor integrators is demonstrated through transistor-level SPICE simulations using BSIM3v3 models.
ISSN:1549-8328
1057-7122
1558-0806
DOI:10.1109/TCSI.2004.835666