Dielectric pockets-a new concept of the junctions for deca-nanometric CMOS devices

A new concept of dielectric pockets is proposed allowing suppression of short-channel effects (SCEs) and DIBL without increasing the channel doping. The dielectric pockets have been implanted into 0.15-/spl mu/m PMOS devices showing substantial efficiency in reducing SCE and I/sub OFF/ current witho...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2001-08, Vol.48 (8), p.1770-1775
Main Authors: Jurczak, M., Skotnicki, T., Gwoziecki, R., Paoli, M., Tormen, B., Ribot, P., Dutartre, D., Monfray, S., Galvier, J.
Format: Article
Language:English
Subjects:
Architecture
Channels
CMOS
CMOS integrated circuits
Devices
Dielectrics
Doping
Pocket
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Summary:A new concept of dielectric pockets is proposed allowing suppression of short-channel effects (SCEs) and DIBL without increasing the channel doping. The dielectric pockets have been implanted into 0.15-/spl mu/m PMOS devices showing substantial efficiency in reducing SCE and I/sub OFF/ current without altering the current drive. The dielectric pockets thus embody the ideal pocket architecture.
ISSN:0018-9383
1557-9646
DOI:10.1109/16.936706