A 110-MHz 84-dB CMOS programmable gain amplifier with integrated RSSI function

This paper describes a CMOS programmable gain amplifier (PGA) that maintains a 3-dB bandwidth greater than 110 MHz and can provide an 84-dB gain control range with 1-dB step resolution. The PGA can also be operated in a low-power mode with 3-dB bandwidth greater than 71 MHz. Integrated with this PGA...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2005-06, Vol.40 (6), p.1249-1258
Main Authors: WU, Chun-Pang, TSAO, Hen-Wai
Format: Article
Language:English
Subjects:
Amplification
Amplifiers
Analog integrated circuits
Applied sciences
Bandwidth
Baseband
Circuit properties
Circuits
CMOS
CMOS analog integrated circuits
CMOS logic circuits
CMOS RF transceiver integrated circuits
Consumption
Design. Technologies. Operation analysis. Testing
Dynamic range
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Electronics packaging
Exact sciences and technology
Frequency
Gain
Gain control
gain-programming logic
IF amplifier
Integrated circuits
intermediate-frequency amplifiers
programmable gain amplifier
Radiofrequency amplifiers
received signal strength indicator (RSSI)
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Signal processing
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Description
Summary:This paper describes a CMOS programmable gain amplifier (PGA) that maintains a 3-dB bandwidth greater than 110 MHz and can provide an 84-dB gain control range with 1-dB step resolution. The PGA can also be operated in a low-power mode with 3-dB bandwidth greater than 71 MHz. Integrated with this PGA is a CMOS successive logarithmic detecting amplifier with a /spl plusmn/0.7-dB logarithmic accuracy over an 80-dB dynamic range. It achieves -83-dBm sensitivity and consumes 13 mA from a single 3-V supply in the normal power mode. The chip area, including pads, occupies 1.5/spl times/1.5 mm/sup 2/.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2005.848023